Logic Analyzer Software Review « irq5.io. I was looking into the Openbench Logic Sniffer (OLS) client, an open source logic analyzer software to be used with the Logic Sniffer from Dangerous Prototypes and Gadget Factory, so I thought it might be worthwhile to look at other alternatives, including commercial products. In the next few posts, it will probably become obvious why I’m doing this. Since I do not have any of the hardware, I must make it clear that I am only reviewing the software that is meant to be used with their analyzers.
Good logic analyzer products will usually make their software available free, with either some demo files or a means to generate random or test waveforms. Written in C++, Qt. Runs on Windows, Mac and Linux. Zooming in and out is achieved by clicking or right-clicking in the waveform window, respectively. Random data generation (simulation). Analyzers. Annotations. Cursors. Extensibility. Written in Java. Random data comes from a “test device”. SUMP compatible Arduino based logic analyzer. Hello everyone. I work in Silicon Valley in the networking field and electronics are just a hobby. One that I am not that great at yet, but nevertheless a fun one. I recently got an Open Bench Logic Sniffer from the Gadget Factory and found it to be a very handy device, even though I haven't had any direct experience with commercial logic analyzers. Initially I had looked around for an Arduino based logic analyzer since I had a handy Arduino board and an interest in making a simple signal / function generator, but needing a way to very the timing.
Ultimately I was able to get some fairly precise sampling on the Arduino by watching a debug pin with the OLS and eventually I had a really basic working SUMP compatible logic analyzer! I call it the "Arduino Generic Logic Analyzer" or AGLA. I asked Jawi for some help on the client adding a few tweaks to make it easier to use an Arduino. The BP initially and then the OLS were invaluable for my work and getting accurate timing. -Andrew. Logic analyzer | coreboot developer blogs. I got the sump.org Logic Analyzer running on a Xilinx Spartan-3E FPGA starter kit board. This wasn't too difficult, but there were some annoying problems that I'll share with you.
Buying the board The particular board is not sold by Xilinx anymore, but the company that actually designed the board for Xilinx, Digilent Inc., still sell it. Installing and setting up the tools Once again I downloaded and installed the 32-bit ISE WebPack 11.1 software on 32-bit Linux. It's a 2.8GB download which installs to roughly 5GB. (After deleting 1GB of .xinstall folders left from the installation.. wtf..) Installation ran fine as a regular user. I struggled for a while with iMPACT not finding the built-in Xilinx programmer cable on the starter kit board. Wrong firmware downloaded to the USB controlleriMPACT stubbornly trying to use kernel windrvr instead of libusb USB controller firmware iMPACT insists on ignoring libusb Eventually I found the problem.
Downloading a logic analyzer From files to hardware Notes. Logic Analyzer Software Review « irq5.io. Testing MPLABX and Open Bench Logic Analyzer (part-2) | Oakkar7, another Blog. The previous post is about the installation, developing and programming of logic analyzer testing circuit with MPLABX. Now, it is time to test with my new OBLS. Connect all input test connectors with PIC PORTB pins and also ground. Power up the circuit. First, I tested the circuit with oscilloscope to sure the code and circuit are working. Good, output signals are generating.
I tested all pins of PIC PORTB. There are several of client software to use with OBLS. I don’t want to use .NET and python. The SUMP client has a installer and installation is straight forward. For some clients, when you plugin analyzer USB cable to PC, point the driver for “mchpcdc.inf” file. The next is OLS client. . - To start measurement, start OLS client - At menu bar, select Capture–> Device –> Openbench LogicSniffer. - At menu bar, select Capture–> Begincapture. World’s Simplest Logic Analyzer for $5. Today’s post documents my recent hack that may just be the world’s simplest logic analyzer. More accurately, it is a circuit consisting of a 74HC126 quad buffer chip and R-2R resistor network (eleven 330 ohm resistors) that acts as a D/A converter, enabling one to analyze four logic lines with a single channel digital oscilloscope and $5 in parts! With the circuit described below and an entry level USB scope like the PicoScope 2204, bursts of data can be captured at 10 MSps (million samples per second), and continuous capture rates of 2.5 MSps are possible, the length of the capture only limited by your PC’s memory.
This is obviously much better than recently covered Bus Pirate’s 1 MSps for 4 ms! Even higher throughput can be achieved with better scopes, although the A/D conversion requires several consecutive samples at same logic level, which means that a 100 MHz scope with 200 MSps capture rate should generally be able to analyze logic operating at ~40 MHz speeds. How It Works. Logic Analyzer Client. The Java client should run on most platforms for which JRE 1.4.2 or newer and the RXTX package exist. This means it should work with Linux, Windows, Solaris and many more. The client allows to configure the device, read and display captured data and to perform file operations on captured data. It can be extended with plugins and some classes can be reused for own applications.
See the developer documentation for details: API Documentation 3rd Party Packages RXTX - Provides access to serial ports (required) PgsLookAndFeel - Provides the look and feel seen below (optional) Screenshots of Version 0.8 The new I2C protocol analyzer: Screenshots of Version 0.7 Capture dialog with new complex trigger: SPI Protocol Analyzer Plugin: Screenshots of Version 0.6 This screenshot shows the client with data captured from the test generator. The display configuration can be customized using the diagram settings dialog: All settings of the physical logic analyzer can be controlled with the capture dialog: Prototype: Openbench Logic Sniffer logic analyzer.
The most recent documentation is now on the wiki Openbench Logic Sniffer is an open source logic analyzer. It’s designed to support the SUMP logic analyzer software at the lowest possible cost. Download the source and design files from the Gadget Factory project page. This project started in the comments on a post. The Open Logic Sniffer is a purpose-built logic analyzer board designed to be low cost but high speed. 70MHz+ sample speeds32 channels16 buffered, 5volt tolerant channelsUSB interface, USB poweredUSB upgradable everythingMake it as DIY as possibleMake it as open source as possible$30-$40 price range We didn’t quite hit our initial price range, but we got really close.
You can get your own assembled Open Logic Sniffer at Seeed Studio for $45, including worldwide shipping. Concept Overview SUMP is an open source Java logic analyzer client by Michael Poppitz. SUMP is a sampling logic analyzer. SUMP is typically ported to a general-purpose FPGA development board. Our Design Cons: Buy Open Workbench Logic Sniffer [OBC101E1P. Basil Watson | 2012-09-02 Intermittent Logic Sniffer I purchased unit ver 1.01 some time back . It worked for about a year. It now works very intermittently.
I have tried loading all version of firmware but no success. Occasionally the trig led will come on when it is connected, but it will only work for a short while. Is there anyway I could get it checked or should I just throw it away. Hi,you can sent e-mail to jack.gassett@firstname.lastname@example.org(the designer of this project).And thank you for your understanding. Answered by Jacket Chueng | 2012-09-05 Was this useful? 74LVCH16245, for 1.8V support Hi, why not use a 74LVCH16245 input buffer instead of the 74LCX16245? Hi Eric , sorry that we don't quite familiar with this products because it was designed by dangerousprototype.Please ask on the official website Thanks for your understanding.
Deray Wu | 2012-08-20 Was this useful? Teelock Shailesh | 2012-05-08 comunication of spi ,12 n usart. Open Bench Logic Sniffer "case" The Open Bench Logic Analyser is a cheap ($50) open source logic analyser board, which talks a standard (ie open) protocol to a PC client. Very useful! As it's just a bare board, lots of people have designed and build their own case for it. Many are built with 3d printers and related methods. I did one too, but instead of going the real high tech route, I just used a slab of 6mm Perspex, cut into 3 pieces and with slots milled for the PCB to slide into. Check it out: Open Workbench Logic Sniffer First Impressions « Silly Science. A while ago I spotted the Open Workbench Logic Sniffer on Hackaday. A logic sniffer . analyser is a useful tool have around the place and at ~$50 with some flying leads to make it up to the free shipping threshold.
Seeing as it arrived the other day I thought I would share my first impressions of it... The Board The system comes shipped as a bare board - so I need to get some self adhesive rubber feet for it really - I will also keep my eye out for a potential case as well. The main components is a Xilinx Spartan FPGA. The whole thing is based on the SUMP FPGA base logic analyser - so no big surprises that this is the main work horse! It also has a Microchip 18F24 which looks like it is handling the USB interface. The board also has several non-populated through hole headers which are for PIC ICSP, FPGA JTAG and some kind of expansion pins (as well as a set of four labelled TRG1 CK1 TRG0 and CK0). At the end of the board we have the analyser bus. Installation Testing Conclusion. 17 Channel Logic Analyzer. Download LogicAnalyzer 1.5 - 1.73 MB A digital oscilloscope with serial analyzer for the parallel port.
Features Digital Oscilloscope / Logic Analyzer with up to 17 input lines Uses the parallel (printer) port for input. While Logic Analyzers normally are very expensive, this one is for zero cost Written in speed optimized C++ to get the maximum possible sample rates The program is a stand alone single EXE file which neither needs any additional DLLs nor any framework. Versions Version 1.0: Initial version Version 1.1: Serial Analyzer for asynchronous signals improved Version 1.2: Support for 9-Bit asynchronous protocols Version 1.3: New Option: Only display of the decoded Bytes as Html (very fast) or display below the graphics. Version 1.4: Selection of a time interval where to start and stop a partial Analysis in large Capture data Version 1.5: Statusbar with Progress display Why Still Using the Good Old Parallel Port ? Why not using USB adapters ? The Parallel Port The Drivers. Open Bench Logic Sniffer.