JTAG FAQ. Maintainer: Stas Khirman < staskh at users.sourceforge.net> Current Version: 0.04 Last-modified: February 21, 2004 Original URL: Table Of Contents: 1. 1.1. 1.2. 1.3. 1.4. 1.5. 1.6. 1.7. 1.7.1. 14-pin JTAG header4 1.7.2. 20-pin JTAG header5 1.7.3. 8-pin JTAG header5 2. 2.1. 2.1.1. 2.1.2. 2.1.3. 2.1.4. 2.2. 2.2.1. 2.2.3. 2.2.5. 2.2.6. 3. 3.1. 3.2. 4. 4.1. 4.2. 5. 5.1. 5.1.1. 5.1.2. 5.1.3. 5.3. 5.5. 5.6. 1.1. Future JTAG reading: Here is a download of a 77-page JTAG tutorial from ASSET InterTech. Link to pdf of tutorial Link to mailing address form Link from ASSET to more JTAG resources Also: AVR specific Boundary-Scan Tutorial 1.2. 1.3. GoodFET -- Home. Dave's Hacks. Travis Goodspeed's Blog. JTAG Tutorial. Since its introduction as an industry standard in 1990, boundary-scan (also known as JTAG) has enjoyed growing popularity for board level manufacturing test applications.
JTAG has rapidly become the technology of choice for building reliable high technology electronic products with a high degree of testability. Due to the low-cost and IC level access capabilities of JTAG, its use has expanded beyond traditional board test applications into product design and service. This article provides a brief overview of the JTAG architecture and the new technology trends that make using JTAG essential for dramatically reducing development and production costs, speeding test development through automation, and improving product quality because of increased fault coverage.
The article also describes the various uses of JTAG and the tools available today for supporting JTAG technology. What is JTAG? A Brief History of JTAG Figure 1 - Typical JTAG Device Figure 2 - Interconnect Test Example.