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Enter member code “Spring11” at checkout. Thanks for spreading the word! Reduced instruction set computing. Reduced instruction set computing, or RISC , is a CPU design strategy based on the insight that simplified (as opposed to complex) instructions can provide higher performance if this simplicity enables much faster execution of each instruction.
A computer based on this strategy is a reduced instruction set computer, also called RISC. The opposing architecture is called complex instruction set computing, i.e. CISC. Various suggestions have been made regarding a precise definition of RISC, but the general concept is that of a system that uses a small, highly-optimized set of instructions, rather than a more specialized set of instructions often found in other types of architectures. Another common trait is that RISC systems use the load/store architecture,[1] where memory is normally accessed only through specific instructions, rather than accessed as part of other instructions like add. History and development[edit] An IBM PowerPC 601 RISC microprocessor.
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